Recently, an entire circuit system has been required to achieve lower power consumption. A processor portion in such circuit system is often not used even during the operation of the circuit system. Accordingly, reduction in the power consumption of the processor portion leads to reduction in the power consumption of the entire circuit system. Therefore, a method has been employed in which the power consumption of the processor portion is reduced by lowering an operation frequency when the processor is not used. However, with the method, operating power cannot be turned off even while the processor is in stand-by. Thus, further reduction in the power consumption is needed. Against the background, it is conceivable to configure a cache included in the processor with a nonvolatile memory and to disconnect the operating power to the processor portion while the processor is in stand-by. However, the performance of the processor is deteriorated because a write speed of a nonvolatile memory is slower than that of a volatile memory.